[Libre-soc-bugs] [Bug 806] Nest should be able to run at different clock rate than main CPU

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=806

--- Comment #17 from tpearson at raptorengineering.com ---
(In reply to Luke Kenneth Casson Leighton from comment #16)
> dram_clk_freq.  then, later, spi_clk_freq.  if they happen to be
> made the same they can probably be aliased. TODO on that one.
> 
> [EDIT: no, i have to get on with the linux bring-up
> y'know what? i'll pull this over.  there's great bits of code here
> in easy-to-cut-paste chunks]

OK, so as I understand things you'll pull the bits you want for now, and when
that's done I'll go back and verify the overall clock trees etc. for DRAM?

We do need to be careful here with clock domains, there are a fixed number of
clock routing resources (device dependent) and it's very easy to get oneself
into an unnecessary corner halting future development by consuming too many of
them early on...

There's one rather obvious option that hasn't been applied here either -- what
about simply paramaterizing the DRAM clock names at module instantation? 
That's basically what I am doing for the WBASyncBridge clock domain
connections.

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