[Libre-soc-bugs] [Bug 806] Nest should be able to run at different clock rate than main CPU

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=806

--- Comment #1 from tpearson at raptorengineering.com ---
Initial implementation available as of soc cfb86bb7 and ls2 2d7021ba (ddr3
branch).  Tested and apparently working at 50MHz core / 100MHz nest, although
the nest doesn't currently meet timing at that frequency and will need further
optimization / bus splits.

fw..DRAM init... initseq
done
MR profile: 00000B20 00000806 00000200 00000000
Rdly
p0: 01110011
Rdly
p1: 01110011
Auto calibrating... find mindone
Auto calibration profile:p0 rdly:00000002 p1 rdly:00000002
Reloading built-in calibration profile...DRAM test...
done

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