[Libre-soc-bugs] [Bug 784] Implement cl* instructions for carry-less operations
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue Apr 5 12:48:59 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=784
--- Comment #9 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
95 def elaborate(self, platform):
96 m = Module()
97 xor_reduce = BitwiseXorReduce(self.__reduce_inputs())
98 m.submodules.xor_reduce = xor_reduce
99 m.d.comb += self.output.eq(xor_reduce.output)
100 return m
yeah looking at the comment in line 26 that can be entirely
replaced with
from nmutil.util imprt treereduce
comb += treereduce(self.reduce_inputs(), operator.xor)
please delete BitwiseXorReduce entirely. if the HDL generated
is complex then have self.reduce_inputs() store its yielded terms
in intermediary Signals (pass m as a parameter to reduce_inputs
in order to do so)
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