[Libre-soc-bugs] [Bug 730] adapt ALU test cases to include expected results

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=730

--- Comment #22 from vklr at vkten.in <vklr at vkten.in> ---
The test output shows register values in decimal. Can it be made to output in
hex.

asserting...reg 0 0 0
code, frepr(code) cmp cr2, 1, 6, 7 'cmp cr2, 1, 6, 7'
asserting...reg 1 18446744073709551605 18446744073709551605

18446744073709551605 = 0xfffffffffffffff5

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