[Libre-soc-bugs] [Bug 730] adapt ALU test cases to include expected results

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Nov 8 00:23:15 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=730

--- Comment #21 from vklr at vkten.in <vklr at vkten.in> ---
Test fails for:
def case_cmp(self):
 lst = ["subf. 1, 6, 7",
        "cmp cr2, 1, 6, 7"]
        initial_regs = [0] * 32
        initial_regs[6] = 0x10
        initial_regs[7] = 0x05
        e = ExpectedState(pc=8)
        e.intregs[1] = 0xfffffffffffffff5
        e.intregs[6] = 0x10
        e.intregs[7] = 0x5
        e.crregs[0] = 0x8
        e.crregs[2] = 0x4
        self.add_case(Program(lst, bigendian), initial_regs, expected=e)

I have put in the expected things as generated in /tmp folder.

When I rerun get this failure notice:

asserting...cr 0 0 8

======================================================================
FAIL: run_all (soc.simple.test.test_runner.TestRunner) [case_cmp]
----------------------------------------------------------------------
Traceback (most recent call last):
  File "/home/vklr/src/openpower-isa/src/openpower/test/runner.py", line 273,
in process
    last_sim.compare(test.expected)
  File "/home/vklr/src/openpower-isa/src/openpower/test/state.py", line 97, in
compare
    self.crregs, s2.crregs))
AssertionError: 0 != 8 : cr reg 0 (sim) not equal (expected) 'cmp cr2, 1, 6,
7'. got 0  expected 8

----------------------------------------------------------------------
Ran 1 test in 3.053s

FAILED (failures=1)

---
What can be done?

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