[Libre-soc-bugs] [Bug 739] NGI POINTER Gigabit Router Pinout Considerations

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sat Nov 6 12:42:20 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=739

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-soc.org/180nm_Oct2020/ls180/

Andrey notice how the Power is not completely in the corner,
but is not in the middle either, but also how they group
together.

also note, PLL is right in the top corner, and, also, note
that any clock lines are (or should) be away from unrelated
high speed transients.  e.g. ULPI CLK should not be directly
next to an EINT which might be for an external button with a
lot of "bounce" on the contacts.

Staf, Jean-Paul: a 256-pin package is going to be 64 pins per side.

are there any special considerations for that?

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