[Libre-soc-bugs] [Bug 739] NGI POINTER Gigabit Router Pinout Considerations

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=739

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |Jean-Paul.Chaput at lip6.fr,
                   |                            |staf at fibraservi.eu

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
jean-paul, one thing: when we discussed the additional clocks
coming from peripherals (JTAG TCK, RGMII CLK, ULPI CLK) these are inputs
that are planned to be routed through JTAG Boundary Scan, just like all
others.

later (in a future version) they may also be routed through
pinmux (4 peripherals MUXed
to/from the exact same IOpad, under GPIO control)

is that okay?

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