[Libre-soc-bugs] [Bug 491] MMU POWER9 pipeline needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=491

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
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                 CC|                            |libre-soc at platen-software.d
                   |                            |e

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
in test_core.py 

def set_mmu_spr(name, i, val, core): #important keep pep8 formatting
        fsm = core.fus.fus["mmu0"].alu
        yield fsm.mmu.l_in.mtspr.eq(1)
        yield fsm.mmu.l_in.sprn.eq(i)
        yield fsm.mmu.l_in.rs.eq(val)
        yield
        yield fsm.mmu.l_in.mtspr.eq(0)
        print("mmu_spr was updated")

this is defeating the object of the exercise of having the unit tests,
because the unit tests are supposed to test the exact path, above.

the correct action is to modify the SPRs *directly* in the fsm.mmu
and *also* to store them in the SPR regfile.

then when the unit test enumerates the SPR regfile after the test has run,
the fsm.mmu will have modified them (in the test), and the unit test can
detect that.

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