[Libre-soc-bugs] [Bug 755] add grev instruction (OP_GREV)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=755

--- Comment #17 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
wark.  has to be lut3 (8 bit table) because the step bit has
to be included

gternlut3(RT, RA, leftlut8, rightlut8)
   for i in range log2wid
      step = steps[i]
      for j in width:
          if j ^ xorstepthing: lut = leftlut8 else rightlut8
          bit = lut3fn(step[j], step[j^xorstepthing], RA[i], lut)
          outstep[j] = bit

this could end up as a huge number of gates, and, also, makes an
immediate version impractical unless leftlut8 and rightlut8 are
constructed from each other (restricting the options)

    leftlut7 = immed
    rightlut8 = immed[0:4] + ~immed[4:8]

better i feel would be to use RB

    leftlut8 = RB[0:8]
    rightlut8 = RB[8:16]

and RC for the selector.  actually probably RC for lut pair and
RB for the selector-immediate because the convention is to put
any immediates down the RB data path.

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