[Libre-soc-bugs] [Bug 755] add grev instruction (OP_GREV)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=755

--- Comment #16 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
oo, oo, i have an idea. how about using a pair of LUT4s instead of
a pair of MUXes? this would cover gorc and a boatload of other
instructions including all types of bitwise treereduce.

it would look like:

gternlut4(RT, RA, leftlut4, rightlut4)
   for i in range log2wid
      step = steps[i]
      for j in width:
          if j ^ xorstepthing: lut = leftlut4 else rightlut4
          bit = lut4fn(step[j], step[j^xorstepthing], bit4)
          outstep[j] = bit

so there are a *pair* of lut4s, one replacing the left mux,
one replacing the right.

when using this fn, setting the right lut4 to OR its inputs
and the left one to pass its input through would create a
treewise bitlevel OR reduction.

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