[Libre-soc-bugs] [Bug 508] decide package size and pin allocation for 180nm ASIC

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=508

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
staf based on what you said in the meeting last week i remember "QFP-128"
so i based ls180.py on that.  there are around 32 unused (NC) pins meaning
that in theory a QFP-100 could be done.

however i recall that you said you have a preferred standard package size
(QFP-128) and am perfectly happy to go with that.

i have currently set 8x VDD, 8x VSS however there is weirdness in coriolis,
i have no idea what vddick / vddeck are, these appear to be wired to the
VSS/VDD of the actual pads (a separate power supply for the pads themselves?)

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