[Libre-soc-bugs] [Bug 508] decide package size and pin allocation for 180nm ASIC

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=508

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
    NLnet milestone|---                         |NLNet.2019.Coriolis2
             Blocks|                            |199, 383
                 CC|                            |staf at fibraservi.eu


Referenced Bugs:

https://bugs.libre-soc.org/show_bug.cgi?id=199
[Bug 199] Layout using coriolis2 main core, 180nm
https://bugs.libre-soc.org/show_bug.cgi?id=383
[Bug 383] Complete first functional POWER9 Core
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