[Libre-soc-bugs] [Bug 469] Create D-cache from microwatt dcache.vhdl
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Thu Sep 10 18:38:43 BST 2020
https://bugs.libre-soc.org/show_bug.cgi?id=469
--- Comment #27 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
right, i've gone over dcache.py about 5 times now, just added a set of calls to
string everything together, added cache_ram.py, last one is plru.py and then
actually instantiating the module can be done and syntax errors tracked down.
for all of this, cole, i'm considering dropping in quite a big bit of the MMU
budget, around the EUR 1600 mark, 50:50 because it's a heck of a lot of work.
--
You are receiving this mail because:
You are on the CC list for the bug.
More information about the libre-soc-bugs
mailing list