[Libre-soc-bugs] [Bug 484] Write VHDL to expose CR and XER from Microwatt so single-stepping is possible

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=484

--- Comment #6 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #5)
> (In reply to Cole Poirier from comment #4)
> > (In reply to Luke Kenneth Casson Leighton from comment #3)
> > > Created attachment 100 [details]
> > > compiles (ghdl) version of cr dmi
> > > 
> > > took 2 minutes to get it to compile, some missing semicolons, missing
> > > keyword "signal", not much.  a diff-of-the-diff will be very instructive.
> > 
> > Very cool, thank you. I'm excited take a look at the diff of the diff
> > tomorrow. What are the next steps I should complete?
> 
> given that the XER bits are also in cr_file.vhdl it's probably a good
> idea to simply return those alongside the dbg_cr_data.
> 
> for a first pass that's probably enough to submit to microwatt.

Thanks. Will make an attempt at this tomorrow, may have some questions once I
make my first attempt at it.

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