[Libre-soc-bugs] [Bug 511] Add a test of IO pins to debug/test/test_jtag_tap.py

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=511

--- Comment #12 from Cesar Strauss <cestrauss at gmail.com> ---
I found something suspicious. The testbench first writes values to some
signals, treating them as inputs:

https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/debug/test/test_jtag_tap_srv.py;h=ff3d330c271ba38af873ea51f82024467988c2d5;hb=HEAD#l65

Then, it reads from the same signals, as if they were outputs:

https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/debug/test/test_jtag_tap_srv.py;h=ff3d330c271ba38af873ea51f82024467988c2d5;hb=HEAD#l78

According to the cocotb testbench
(https://gitlab.com/Chips4Makers/c4m-jtag/-/blob/master/test/nmigen/cocotb/controller/test.py#L122),
the testbench is supposed to write to: *_pad__i, *_core__o and *_core__oe,
and then read from: *_core__i, *_pad__o and *_pad__oe.

The writing part seems OK, but the reading part is wrong. Some of the core/pad
pairs are exchanged with respect to the cocotb testbench.

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