[Libre-soc-bugs] [Bug 485] Create I-Cache from microwatt icache.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=485

--- Comment #67 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #59)
> the test that needs to be written - *still using wb_get when taking two
> arguments one of which is a mem dict* - is to test the icache, *not the
> icache using the mmu*
> 
> in other words look at icache.py unit test and instead of the SRAM add the
> wb_get as the sync process with a nicely pre-prepared mem dict (that
> contains 100 randomly created keys and values)

Ok I've committed my attempt at this, it fails assert valid because I suspect I
haven't connected things quite the right way... but I don't really understand
how to connect them the right way. Can you take a look? You'll have to
uncomment test_icache() at the bottom of the file, I commented it out so as not
to break test_mmu_dcache.py in case tobias is using it.

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