[Libre-soc-bugs] [Bug 485] Create I-Cache from microwatt icache.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=485

--- Comment #64 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #62)
> Can I import it into icache.py 

no.  said this twice now.

> or
> should I be writing the test in the same file as wb_get().

yes.  said that twice now, too. 

> How is wb_get
> connected to ICache? Like this?
> sim.add_sync_process(wrap(icache_test(icache)))
> sim.add_sync_process(wrap(wb_get(icache, icache_mem, "ICACHE")))
> ```

yes.

> > in other words look at icache.py unit test and instead of the SRAM add the
> > wb_get as the sync process with a nicely pre-prepared mem dict (that
> > contains 100 randomly created keys and values)
> 
> I don't see how the wb_get fn can be used in icache.py given the global
> variable... though I think it's likely I'm showing my python ignorance here.

that's why i said (third time) put the test in the same file.

> Of course, I was just starting from the working dcache_mmu_test

indeed.

we don't yet know how to use mmu in icache mode, it will need some research,
reading some of microwatt tests for example.

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