[Libre-soc-bugs] [Bug 526] create dry-run 180nm GDS-II files for IMEC

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=526

--- Comment #53 from Staf Verhaegen <staf at fibraservi.eu> ---
(In reply to Luke Kenneth Casson Leighton from comment #52)
> (In reply to Jean-Paul.Chaput from comment #51)
> 
> ok - can you add that to alliance-check-toolkit, and set up an example?
> (is there a Phantom version of FlexLib that's publicly available? i was
> under the impression that there would be!)
> 
> i'd very much prefer that we're "tracking" what you're doing (right up
> to the point where the "real" (NDA'd) version of FlexLib is used) and
> have full public replicability.

The FlexLib is designed to make use of possibilities of each technology as much
as possible. Result is that the P&R results will differ for each technology. In
that respect I think it is very difficult to make a replica technology that
does not violate the NDA. Therefor I targeted FlexLib P&R results to be only
reproducible by people who are under NDA.

What is planned is to provide the netlist + placement of the cells of what is
taped. This information together with an implementation of the cells in an open
technology like freepdk45 or Sky130 should allow full verification of the
design:

* first given the netlist one should be able to verify that the logic is fully
equivalent with the RTL design.
* second given the placement + layout of the cells in open PDK should allow to
verify that actual produced chip is the one that is taped by delidding an
decapsulating the chip.

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