[Libre-soc-bugs] [Bug 405] Write PowerPC64 backend for Cranelift

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=405

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #5)
> Got a reply on github from Cranelift project:
> https://github.com/bytecodealliance/wasmtime/issues/1183#issuecomment-
> 650116429

that's quite encouraging.  one of the important things to bear in mind
and make clear: we always need to have the non-accelerated software-version
working, first, as an intermediary stepping-stone.  where that used to
be RISC-V RV64GC, it's now POWER9 (PowerISA v3.0B)

then on top of that, once that's stable, we can begin adding accelerated
3D / VPU opcodes.

so kinda by default we become the de-facto maintainers of the POWER9
version.  and consequently, yes, it's appropriate for that to be upstream.

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