[Libre-soc-bugs] [Bug 406] New: Use SAIL's PowerISA formal model to help catch errors
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Fri Jun 26 01:25:22 BST 2020
https://bugs.libre-soc.org/show_bug.cgi?id=406
Bug ID: 406
Summary: Use SAIL's PowerISA formal model to help catch errors
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: Other
OS: Linux
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Formal Verification
Assignee: lkcl at lkcl.net
Reporter: programmerjake at gmail.com
CC: libre-soc-bugs at lists.libre-soc.org
NLnet milestone: ---
Came up during the OpenPower virtual coffee call today.
https://github.com/rems-project/sail/blob/sail2/power/
I found a bug in the SAIL model already:
https://github.com/rems-project/sail/issues/75
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