[Libre-soc-bugs] [Bug 199] Layout using coriolis2 main core, 180nm

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=199

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #5)

> yep, it is initialised with 262144 bits.  that means that somewhere the
> "mem" instance is being passed an address range of (1<<18) where it should
> only be around 1<<6 for these purposes.
> 
> i'll take a look now.

ok that's down to a more sane (hard-coded) 32 entries so the initialisation
is still large (32*64 bits) however it's not 2^18 bits.

btw you'll need to git pull on nmutil as well as soc, there's some
modifications
to the RecordObject class (which will give different names to some signals,
however those names now include the parent object name)

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