[Libre-soc-bugs] [Bug 407] XICS interrupt controller is needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=407

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #7)
> It looks like the documentation they have here, except for the part specific
> to qemu was taken from the XICS spec. So odd that we can't find the actual
> spec.
> 
> https://lists.sr.ht/~philmd/qemu/patches/5642#%3C20190517094435.32765-1-
> clg at kaod.org%3E+docs/specs/ppc-xive.rst

this again is the virtualisation of interrupts, not the actual interrupts. 
cinsequently whilst the same registers appear (CPRR, PIPR) there's nothing
about those.

my feeling is that the spec has never been released: the qemu XICS code for
example is written *by* someone at IBM who had internal access to it.

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