[Libre-soc-bugs] [Bug 324] create POWER DIV pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=324

--- Comment #63 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
oof.  bit of a marathon clean-up / code-morph session, got through
most of it now.

* sim tests seem to work great.
* divpipe tests seem to work great
* FSM not so much, yet.

re-adding use of pia has to be done with some considerable care: not
just ensuring that other developers can (easily) install pia, there is
more to it.

test_div_compunit.py - which doesn't exist and i need to write it - is
a "mirror" of test_div_pipe_caller.py.

basically it does exactly the same job except this time it has a
MultiCompUnit "Manager" on the front-end.

this is a critically important test that makes sure that register
allocations are correct for both read and write, and in particular
that the pipeline sets "self.o.{something}.ok" correctly.

if those are _not_ correct we are in serious trouble because the
hardware will sit there - permanently - waiting for a register
flag to be raised that is never going to happen.


the issue is: the functions for checking the test output are used
by both test_div_pipe_caller *and* the test_compunit.

they have to be developed *in conjunction*.

in addition to that: test_core.py then takes aaallll the test_compunit*
tests and re-runs them *again*, this time actually connecting to register
files.

by not adding support fully for pia into the underlying infrastructure,
critically important unit tests could no longer be run.

therefore, first things first:

1)  bug #436.  full documentation and wait for at least one other
    person to repro the build / install instructions for pia

2)  test_div_compunit needs to be added

3)  *then* pia can be added as a build dependency, making sure that
    it works with both test_div_pipe_caller.py *and* test_div_compunit.py

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