[Libre-soc-bugs] [Bug 421] TRAP pipeline formal correctness proof needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=421

--- Comment #16 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/fu/trap/main_stage.py;h=39f4326d1697d70a86aadbd892bbeef2057c4970;hb=HEAD#l153

reference to book chapter section which explains PI.PRIV flag definitions.

these bitfields do *not* mean anything for exception address 0xc00, they *only*
mean something for 0x700 (trap address).

btw yes that really is address 0x700 as in physical memory address 0x00000700

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