[Libre-soc-bugs] [Bug 432] mulld pseudocode overflow calculation incorrect

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=432

--- Comment #2 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://github.com/antonblanchard/microwatt/blob/master/multiply.vhdl#L72

        if v.multiply_pipeline(PIPELINE_DEPTH-1).is_32bit = '1' then
            ov := (or d(63 downto 31)) and not (and d(63 downto 31));
        else
            ov := (or d(127 downto 63)) and not (and d(127 downto 63));
        end if;

let's take the 64-bit case (because this is mulld).

* 127 downto 63 is 63 to 128 inclusive in nmigen/python
* however the numbering in the pseudocode is *inverted* but *NOT*
  python-style "end+1"

therefore the numbering should be:

* 127-127 to 127-63 which is indeed 0 to 64

i'll go ahead and correct that.

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