[Libre-soc-bugs] [Bug 413] DIV "trial" blocks are too large

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=413

--- Comment #23 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
darn it, i just realised that even attempting to reuse any combinatorial stages
means fully ripping out the entire pipeline infrastructure and replacing it
with a FSM skeleton.

luckily i did this once already for the jondawson IEEE754 FP nmigen conversion.

that involved manually connecting up stages by way of local instances as
regiaters, using ispec and ospec to create and assign them between each clock.

as the entire chain is fully defined by those ispesc and opspecs in a general
purpose opaque fashion (managed by ControlBase) it will be possible to do an
incremental conversion *of the existing code* using a straight for-loop, then
go from there.

however given the size of the DIV pipeline my feeling is it is probably best to
try MUL, first.  this will give an opportunity to reduce the MUL block down
from 64x64 to 32x32 and do 4 loops to create a 128 bit answer.

currently that 128x128 mul is a whopping 1.8 mm^2 so worth the effort to reduce

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