[Libre-soc-bugs] [Bug 417] FSM-based ALU example needed (compliant with ALU CompUnit)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=417

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cesar Strauss from comment #5)
> Started development at src/soc/experiment/alu_fsm.py.
> 
> The example will be a sequential (one bit per cycle) shift operation.

that's a good idea, it's easy to verify the output from a python test
and, funnily enough, one bit per cycle shifting is how jondawson's IEEE754
FPU FSM implements multi-bit shift.  takes a while but it's very compact,
very few gates needed.

i added a NextData class and put in a few pieces cut/paste from alu_hier.py
to make it look like it complies with the CompALU API

commit 916163ed87d7d85e648becc119b9b79c3b20001d (HEAD -> master)
Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
Date:   Thu Jul 9 18:07:25 2020 +0100

    munge alu_fsm Shifter into looking like CompALU API compliant

-- 
You are receiving this mail because:
You are on the CC list for the bug.