[Libre-soc-bugs] [Bug 410] New: Design Bus Protocol suitable for speculative execution
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Wed Jul 1 14:37:23 BST 2020
https://bugs.libre-soc.org/show_bug.cgi?id=410
Bug ID: 410
Summary: Design Bus Protocol suitable for speculative execution
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: Other
OS: Linux
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Source Code
Assignee: lkcl at lkcl.net
Reporter: lkcl at lkcl.net
CC: libre-soc-bugs at lists.libre-soc.org
NLnet milestone: ---
Standard processor Bus APIs (Wishbone) operate on an atomic "take it or leave
it" protocol. This is unsuitable for speculative execution which needs a
"Contract of Sale" protocol involving "offer, exchange, complete" that may be
cancelled or declined. This type of Bus Protocol therefore needs to be
designed, implemented and documented.
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