[Libre-soc-bugs] [Bug 230] Video opcode development and discussion

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=230

--- Comment #29 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to cand from comment #28)
> > the other one involves 32-bit src and 128-bit dest so i'll need to think about it.
> 
> Please tell me which part is the hangup, so I'll know for future instrs.

the routing, because of the different sizes of src and dest, when it comes to
getting data from different parts of the register file and to Function Units

right now the plan is to have 4-way stratification of the Function Units.  so
anything that comes to *and from* a register number modulo 4, no problem.

thus there will be four *separate* sets of Function Units that cannot talk to
each other.

https://libre-soc.org/openpower/sv/example_dep_matrices/

anything *not* matching that pattern has go through *another* (completely
separate) set of Function Units that do not have that same restriction on the
reg numbering.

but

the routing in and out of that last set is going to be absolutely massive
crossbars (4x4 64-bit, and we'll need up to *FIVE* of those as inputs in some
cases)

by having this type of "stratified" Function Units the register file porting is
kept down to sane numbers (4R1W) where if we didn't do that, we'd need insane
numbers of regfile ports (12R8W) which requires huge amounts of specialist
expertise to design and consume vast amounts of power.

plus: everything revolves around 64-bit maximum.

so because the numbering of src and dest do not match "modulo 4", the
operations will have to go through the (bottlenecked) FUs.

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