[Libre-soc-bugs] [Bug 526] create dry-run 180nm GDS-II files for IMEC

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=526

--- Comment #91 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Staf Verhaegen from comment #90)

> The chips will target 3.5mm x 3.5mm including IO ring. So I propose to make
> the core such that the just fits in the IO ring is 3.5mm x 3.5mm. No need to
> find minimal core size for placer.

it is time.  the full completion is O(N^2) or O(N^3) and so iterating to find
bugs would have to move to an entire day cycle if hard-fixed at the maximum
size whereas at a smaller size it is tolerable (just) to perform 4-6 bugfixing
iterations per day.

> I also propose to allow JP to play with the core size later without needing
> to iterate with you guys when also PLL and SRAM is included in the design
> (not this one).

yes, it is just one parameter.

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