[Libre-soc-bugs] [Bug 526] create dry-run 180nm GDS-II files for IMEC

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=526

--- Comment #90 from Staf Verhaegen <staf at fibraservi.eu> ---
(In reply to Luke Kenneth Casson Leighton from comment #81)
> (In reply to Jean-Paul.Chaput from comment #79)
> > Hello Luke,
> > 
> > I'm ready to perform tests on the full core, could you generate it and
> > commit it? (il/json)
> 
> json should not change at all, that is pinouts, will do core tomorrow.
> 
> if you know a way to get quick core size estimate rather than taking 20-30
> minutes to place *then* fail, then i increment chip size and do it all over
> again, that would be handy :)

The chips will target 3.5mm x 3.5mm including IO ring. So I propose to make the
core such that the just fits in the IO ring is 3.5mm x 3.5mm. No need to find
minimal core size for placer.

I also propose to allow JP to play with the core size later without needing to
iterate with you guys when also PLL and SRAM is included in the design (not
this one).

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