[Libre-soc-isa] [Bug 529] scheme for supporting 16/48-bit instructions on PowerPC LE with full backward compatibility

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Nov 11 22:27:15 GMT 2020


https://bugs.libre-soc.org/show_bug.cgi?id=529

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-soc.org/openpower/sv/major_opcode_allocation/

it's complicated but quite elegant, i like it.  i am trying to think through
how mixed 16/32/48 would actually work.  it woukd be necessary i think to pop
16 bit instructions out of bytes 2+3 and leave 0+1 still at the front of the
queue.

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