[Libre-soc-dev] daily kan-ban update 11mar2022

[Luke Kenneth Casson Leighton]

On Sun, Mar 13, 2022 at 11:08 AM Boris Shingarov <shingarov at labware.com>
wrote:

> > if you don't get the external uart working, the usb serial adaptor
> > that's programmed into the fpga is known to work
> FWIW I can confirm that the external uart works for me with zero problems.
>

which one do you have? (what IC is on it - an FT232R? FT2232?)

Just be aware that the RX/TX polarity shown in Matt's "Little Guide" is
> misleading, in reality the IO0 pin is the crab's TX and IO1 is the
> crab's RX.
>

luckily there are only 2 wires :)

also bear in mind that it's the constraints (orangecrab_r0.2.lpf) file
which defines the relationship between the verilog signal (uart0_rxd)
and the pin-pad (IO0/IO1), you could just as easily swap the
definitions in the constraints file rather than swap the hard-wires
themselves.

l.