[Libre-soc-dev] Coriolis 2 - Tutorials and check

[Santhosh Kumar V V .]

Yes, that is correct. I tried running the coriolis 2 and it works fine, I
got the chip view too.

On Wed, Aug 10, 2022 at 10:20 AM Veera <vklr at vkten.in> wrote:

> On Tue, Aug 09, 2022 at 10:52:14PM -0400, Santhosh Kumar V V . via
> Libre-soc-dev wrote:
> > I tried running the codes as you instructed it works fine Now
> > *I can see the chip_r in cgt.*
> > I proceeded with the same instructions to make /build_full_4ksram.sh
> >
> > They are showing some errors.
> >
> > Traceback (most recent call last):
> >   File "/home/santhosh/alliance-check-toolkit/bin/yosys.py", line 8, in
> > <module>
> >     from   helpers.io import ErrorMessage
> >   File
> >
> "/home/santhosh/coriolis-2.x/Linux.x86_64/Release.Shared/install/lib64/python2.7/dist-packages/crlcore/helpers/__init__.py",
> > line 101
> >     print textStackTrace( trace, True )
> >                        ^
> > SyntaxError: invalid syntax
> > make: *** [mk/synthesis-yosys.mk:53: ls180.blif] Error 1
> >
> > sorry for sending the previous message to you alone, It was my mistake
> and
> > I'll send it in dev group hereafter.
> >
>
> Hi,
>
> I will look into issue.
>
> Santhosh, did coriolis2 built correctly?
> Is make /build_full_4ksram.sh only failing?
>
> Regards,
> Veera
>