[Libre-soc-dev] Coriolis 2 - Tutorials and check
Veera
vklr at vkten.in
Wed Aug 10 05:44:06 BST 2022
On Tue, Aug 09, 2022 at 10:52:14PM -0400, Santhosh Kumar V V . via Libre-soc-dev wrote:
> I tried running the codes as you instructed it works fine Now
> *I can see the chip_r in cgt.*
> I proceeded with the same instructions to make /build_full_4ksram.sh
>
> They are showing some errors.
>
> Traceback (most recent call last):
> File "/home/santhosh/alliance-check-toolkit/bin/yosys.py", line 8, in
> <module>
> from helpers.io import ErrorMessage
> File
> "/home/santhosh/coriolis-2.x/Linux.x86_64/Release.Shared/install/lib64/python2.7/dist-packages/crlcore/helpers/__init__.py",
> line 101
> print textStackTrace( trace, True )
> ^
> SyntaxError: invalid syntax
> make: *** [mk/synthesis-yosys.mk:53: ls180.blif] Error 1
>
> sorry for sending the previous message to you alone, It was my mistake and
> I'll send it in dev group hereafter.
>
Hi,
I will look into issue.
Santhosh, did coriolis2 built correctly?
Is make /build_full_4ksram.sh only failing?
Regards,
Veera
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