[Libre-soc-dev] Gigabit Router Pinmux Considerations

[Andrey Miroshnikov]

Hi All,

Yesterday after the chat I did a quick draft of the pinmux page for the 
router:
https://libre-soc.org/crypto_router_pinmux/

I only included an estimate for the required number of pins (before any 
muxing). While writing this email actually answered a lot of my 
questions and updated the pin counts hahaha

The page is also linked to main crypto router page:
https://libre-soc.org/crypto_router_asic/


Currently checking the pins required for various interfaces (which I'll 
add to the wiki page once I create class for the router ASIC).

Here are some questions that I have:
- Why was does the RGMII interface we use require 20 pins? - Last night 
I found a 12 pin version where some of the extra signals are encoded 
using the data lines (perhaps our PHY doesn't support this, see Section 
3.4: 
https://web.pa.msu.edu/hep/atlas/l1calo/hub/hardware/components/micrel/rgmii_specification_hp_v1.3_dec_2000.pdf)

- Is the SDRAM1 interface the same as the one used in LS180?.

- Which package is going to be used for the router ASIC? - During the 
meeting I heard QFP, but the pincount was not specified.

- Are all the interfaces mentioned in the crypto router page required? -
I have not included PWM in my calculations. PWM might be handy for LEDs 
(that's where I've usually seen them used for).


Should I also put this under a new bug somewhere?


Andrey