[Libre-soc-dev] PLL integration

Luke Kenneth Casson Leighton lkcl at lkcl.net
Tue May 25 01:44:14 BST 2021

On Monday, May 24, 2021, Jean-Paul Chaput <Jean-Paul.Chaput at lip6.fr> wrote:

>   It seems to me as the simplest way to proceed. Just renaming
>   "out" into "out_v" so the blackbox and the GDSII can be seamlessly
>   assembled/merged inside Coriolis.

willdo, tomorrow.  nmigen, verilog, blackbox vbe


crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

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