[Libre-soc-dev] [RFC] horizontal SVP64 vectors

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed Jul 7 18:11:29 BST 2021

there is a trail here which takes some explaining.

* REMAP schedules at present may only apply to one instruction.
* Zero Overhead Loop Control is unbelievably brilliant and efficient
(40% reductions in algorithm runtime) but too radical
* ZOLC works on EXACTLY the same principle as REMAP except that REMAP
loop hierarchies apply to VL *SUB*-Program-Counter (srcstep, dststep)
and ZOLC applies to the *Program Counter*

so the simplest way to allow REMAP to apply to multiple instructions
is to pull a leaf out of ZOLC's book, and *pause srcstep incrementing*
but allow PC to increment.

right now we have this:

PC += 4
for i in range(VL)
   srcstep += 1

and what i am suggesting is:

PC += 4
PC += 4
srcstep += 1

this would allow the same REMAP schedule to be applied to *multiple
instructions*, then an explicit "svstep" instruction would be called
at the end of a loop to increment srcstep / dststep, and a branch used
to jump back to run the instructions for the next src/dststep.

in this way we can do FFT complex numbers without needing to add them
as first class types (which i was a bit reticent about).

Horizontal Vectorisation is a lot more generic and has far more applications.

thoughts appreciated.


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