[Libre-soc-dev] HDMI, DVI, DisplayPort on SBC (like Raspberry Pi) and on BMC

Luke Kenneth Casson Leighton lkcl at lkcl.net
Tue Jan 26 21:53:19 GMT 2021

On Tue, Jan 26, 2021 at 9:12 PM Jacob Lifshay <programmerjake at gmail.com> wrote:
> On Tue, Jan 26, 2021, 12:53 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> wrote:

> hmm, I would have expected it to be in the PHYs with high current high
> frequency drivers with all the fancy voltage references and stuff and in
> all the delay-locked-loops and logic running double edge clocked. Once the
> internal bus width was increased enough to run at single-edge lower clock
> rates, I would have expected that part to have relatively low power
> consumption.

they included 8-way 256-bit AXI4 Bus Arbitration.  that's *EIGHT*
256-bit wide data paths all contending for the same data, just to make
sure it was kept 100% occupied, without completely overwhelming any
one AXI4 Bus.

that's 2048 data wires (excluding address lines).


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