[Libre-soc-dev] HDMI, DVI, DisplayPort on SBC (like Raspberry Pi) and on BMC

Jacob Lifshay programmerjake at gmail.com
Tue Jan 26 21:12:16 GMT 2021

On Tue, Jan 26, 2021, 12:53 Luke Kenneth Casson Leighton <lkcl at lkcl.net>

> ---
> crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
> On Tue, Jan 26, 2021 at 7:54 PM Cole Poirier <colepoirier at gmail.com>
> wrote:
> > Here's my two cents on this. For the high-bandwidth low-latency
> > applications of video and 3d why don't we use on die (on package?, I'm
> > not familiar enough to know which) LPDDR4X (0.6V vs 1.1V for LPDDR4)
> > which is drastically lower power and much lower latency than off
> > external SDRAM.
> the majority of power consumption for high-bandwidth communications is
> in the multiplexing and the FIFOs just routing the incoming/outgoing
> data internally.
> i found a datasheet randomly online for a DDR3/4 PHY/Controller, the
> "maxed out" configurations (8 AXI4 Ports) were 2 watt *internal* power
> consumption at 22nm.

hmm, I would have expected it to be in the PHYs with high current high
frequency drivers with all the fancy voltage references and stuff and in
all the delay-locked-loops and logic running double edge clocked. Once the
internal bus width was increased enough to run at single-edge lower clock
rates, I would have expected that part to have relatively low power


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