[Libre-soc-dev] daily kan-ban update 27dec2021
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Dec 27 19:30:06 GMT 2021
+ # Shift address bits 61--12 right by 0--47 bits and
+ # supply the least significant 16 bits of the result.
+ comb += addrsh.eq(r.addr[12:62] << r.shift)
another entire day spent, finding that this should be a right-shift
+ comb += addrsh.eq(r.addr[12:62] >> r.shift)
next is an invalid table entry (garbage read), checking that the
right interrupt is created (0x300) and DAR and DSISR are
set, which at the moment they are not.
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