[Libre-soc-dev] Libre-soc-dev] ls180 update
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Apr 19 15:37:24 BST 2021
On Monday, April 19, 2021, Jean-Philippe Turcotte <jp2k5 at hotmail.com> wrote:
> > it's dead simple. search this page for the word "distcc"
> > https://www.veripool.org/wiki/verilator/Manual-verilator
> > you set an env var OBJ_CACHE, that's it.
> Okay, but that will not touch the VHDL-to-C++ part, right?
correct. you are compiling locally, verilator installed *locally*
> Is that assumed to be relatively fast?
it took maybe 20 minutes to create the 3,000 c++ files, from a 1,000,000
line long verilog file.
> Also, should I use ccache?
yes. it can be done, again, used *locally*.
> It does not work with distcc’s pump mode, but I would presume that a
> slower first run is a good trade-off.
there is a way to cheat by symlinking distcc to ccache.
this tells ccache to call distcc and monitor (and cache) its output. this
should do the trick:
ln -s /usr/bin/ccache ~/bin/distcc
> > document everything. create a wiki page, put *all* the commands and
> > procedures in it.
> Roger that.
it's important so that i (and others) can repro very quickly.
> > benchmarks already show llvm-9 is fastest.
> So that is what I will use (or whatever version is in Buster’s repos,
> which I will write down).
> > running locally.
> > what processor do you have in a PC ?
> I think I have an old i386 laying around. :P
if you do not have a machine with absolutely mental amounts of RAM (like,
64 GB or above) we may be able to arrange something.
do not under any circumstances try linking massive binaries once distcc
gets the object files onto your machine. if you go into swap space
(during linking), by mistake it will cause your machine to melt. loadavg
120 or above is not uncommon.
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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