[Libre-soc-dev] VERSA_ECP5 JTAG TAP interface confirmed functional

Cesar Strauss cestrauss at gmail.com
Thu Apr 15 22:15:19 BST 2021

On 04/15/2021 14:40, Tobias Platen wrote:
> That looks great. I already had a look at the ULX3S which has 32 MB
> SDRAM. I doubt that this is enough for booting Linux. There are two
> other ECP5 dev boards, the LogicBone [1] and the Akita [2]. [1] has
> more RAM, but it seems to use a smaller FPGA.

What about the ECPIX-5?


- 45K LUT and 85K LUT variants
- 256MB of DDR3L RAM
- LiteX/Migen/nMigen programming


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