[Libre-soc-dev] cxxsim with jtag connections

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sat Apr 10 10:11:13 BST 2021

On Sat, Apr 10, 2021 at 8:56 AM Staf Verhaegen <staf at fibraservi.eu> wrote:

> > https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/debug/firmware_upload.py;hb=HEAD
> Could this also be updated to generate .svf files ?Staf.

it's got direct access to the bitstream, i don't see why not.


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