[Libre-soc-dev] Running the libre-soc CPU under cxxsim
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Tue Sep 22 11:26:40 BST 2020
On Tue, Sep 22, 2020 at 11:18 AM Cesar Strauss <cestrauss at gmail.com> wrote:
> Em 19/09/2020 18:58, Luke Kenneth Casson Leighton escreveu:
> > On Sat, Sep 19, 2020 at 10:41 PM Cesar Strauss <cestrauss at gmail.com> wrote:
> >> Note that "nmigen.sim.pysim" and "nmigen.sim.cxxsim" were never present
> >> in a released nMigen version, so the change in API, in the middle of a
> >> development cycle, is warranted.
> > ok so we need a big patch to get up-to-date, first. i am holding
> > back, not updating nmigen master regularly in case it introduces bugs
> > (like it did 2 months ago).
> >>> really this should be an environment variable
> >>> import os
> >>> sim = Simulator(m, engine=os.environ.get('NMIGEN_SIM_MODE"))
> >> This is exactly the way that the simulator API now works.
> > excellent.
> Per discussion above, found a way to conditionally switch to cxxsim,
> without losing backwards compatibility with earlier nMigen git versions.
fantastic. i wonder, perhaps that can go into nmutils for now?
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