[Libre-soc-dev] Running the libre-soc CPU under cxxsim

Cesar Strauss cestrauss at gmail.com
Mon Sep 7 23:34:03 BST 2020


There is a new proposed fix in nMigen for a bug in cxxsim.


The test cases in that bug report now all pass.

Whitequark would like us to try the fix on our overall design, not just
the test cases on that bug report.

So, I think it would mean running the libre-SOC CPU under cxxsim.

Can we do it? Which unit test gives the most coverage? Would it be
src/soc/simple/test/test_issuer.py ?

To run cxxsim on a test case:

1) Compile yosys from master branch

2) On nmigen source dir:
    git branch -D cxxsim
    git checkout cxxsim

3) Apply the one-line patch at:

4) On the test case, replace

    sim = Simulator(m)


    sim = Simulator(m, engine="cxxsim")

Optionally (just to avoid printing a warning), change

    from nmigen.back.pysim import Simulator, Delay, Settle


    from nmigen.sim import Simulator, Delay, Settle



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