[Libre-soc-dev] asynchronous clock selection and formal verification

[Luke Kenneth Casson Leighton]

dan's articles are always informative:
https://zipcpu.com/formal/2018/05/31/clkswitch.html

this diagram i find funny because it's an SR NAND latch that's been
modified to be Cross-Domain-Clock synchronised!
https://zipcpu.com/img/clock-switch.svg

l.

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