[Libre-soc-dev] silicon catalyst starting in canada

Cole Poirier colepoirier at gmail.com
Sun Oct 18 14:09:33 BST 2020

On Sunday, October 18, 2020, Staf Verhaegen <staf at fibraservi.eu> wrote:
> Personally I think if you want to understand ASIC development I think
> it is better to study the datasheets/manuals of the proprietary EDA
> tools and try to understand all techniques they currently use in
> production rather than chasing the next fancy paper or start-up. All
> IMHO of course.

Thanks Staf, that’s very helpful, and very nice to be able to benefit from
your experience and wisdom as an expert who has been doing ASIC development
for a long time and can tell me where I can start to have some
understanding myself.

I really want to stress however that I wasn’t chasing this, I just lacked
any ability to understand whether this was in fact an iteration on standard
practices or something totally new and wacky. I am totally and utterly
unqualified to chase anything :) That’s why I asked about it here because I
knew you, and the other list members would know in about two seconds. So,
when I said initially that is was potentially worth pursuing, I meant that
I saw that it was a low-power ‘thing’, went “oh we want our chip to be low
power! Maybe this is relevant to us? I’ll ask the experts on the mailing
list because I wasn’t able to understand more about this ‘thing’ than that
it’s related to low power electronics.”

Since you explained why this isn’t useful and what we should pursue
instead, I now have a marginally improved understanding of ASIC design, and
some good places to start. The last thing I would do is argue with you
about this, because what do I know? Precisely nothing about electronics and
ASIC design, but thanks to to I’m learning something about it so perhaps in
the future I will be able to determine the irrelevance of something similar
without assistance.


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