[Libre-soc-dev] silicon catalyst starting in canada

Cole Poirier colepoirier at gmail.com
Sun Oct 18 00:54:04 BST 2020

On Sat, Oct 17, 2020 at 1:32 AM Staf Verhaegen <staf at fibraservi.eu> wrote:
> whygee at f-cpu.org schreef op za 17-10-2020 om 07:04 [+0200]:
> >
> > The question is "is it scaleable below 180 nm" and I believe
> > that Jean-Paul Chaput and Staf have a much better perspective.
> I haven't dived into this technique specifically but my opinion is that
> we should first try to walk before trying to run. There are enough
> 'classic' low-power techniques to implement in the next years before
> one need to resort to some fancy technique.
> Typically ultra-low power techniques like differential computing, sub-
> threshold computing etc are not meant for compute targeted applications
> like high operating frequency 4-core CPU + GPU.

That's very helpful Staf, thanks for taking the time to explain this
to me. To be clear I was not suggesting we should actually *try* this.
I shared here because I wanted to know if this was possibly relevant
or totally irrelevant but I have no knowledge of electronics so I
needed help to make this determination. You have given me a clear
answer that this isn't useful or applicable, so thanks for your help!


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