[Libre-soc-dev] daily kan-ban update 15oct2020

Luke Kenneth Casson Leighton lkcl at lkcl.net
Fri Oct 16 22:40:57 BST 2020

On Fri, Oct 16, 2020 at 10:37 PM Cole Poirier <colepoirier at gmail.com> wrote:

> Will do, running pywriter.py now, then will run issuer_verilog.py,
> then will test the fpga load with --sys-clk-freq=55.

fpga build you mean.


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